MAX2309 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
MAX2309 Datasheet PDF : 20 Pages
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CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
MSB
LSB
DATA
*SB
*START BIT MUST BE LOGIC HIGH.
CLK
RISE AND FALL REQUIRED PRIOR TO EN GOING LOW.
EN
Figure 6. 3-Wire Interface Timing Diagram
Table 4. Control Register, Default State: 0B57h, Address: 110b
BIT ID
BIT NAME
POWER-
UP
STATE
BIT
LOCATION
0 = LSB
FUNCTION
TM
TEST_MODE
0
12
Must be 0 for normal operation.
Logic “1” causes the charge-pump output CP_OUT to source cur-
rent when fREF/R > fVCO/M. This state is used when the VCO tune
POL
CP_POL
1
11
polarity is such that increasing voltage produces increasing fre-
quency. Logic “0” causes CP_OUT to source current when fVCO/M
> fREF/R. This state is used when increasing tune voltage causes
the VCO frequency to decrease.
TE
TEST_ENABLE
0
10
Must be 0 for normal operation.
TC TURBO_CHARGE
1
9
Logic “1” activates turbocharge mode, which provides rapid fre-
quency acquisition in the PLL.
DS
DIV_SEL
1
8
Logic “1” selects M1/R1 divide ratios. Logic “0” selects M2/R2.
VB
VCO_BYP
0
7
Logic “1” bypasses the VCO inputs for external VCO operation.
VS
VCO_SEL
1
6
Logic “1” selects VCO_H. Logic “0” selects VCO_L.
BD
BUF_DIV
0
5
Logic “1” selects divide-by-2 on LOOUT port. Logic “0” bypasses
divider.
BE
BUFEN
1
4
Logic “1” disables LOOUT. Logic “0” enables LOOUT.
FT
FM_TYPE
0
3
Active in FM mode. Logic “0” selects quadrature demodulator for
FM mode. Logic “1” selects downconversion to I port.
IS
IN_SEL
1
2
Logic “0” selects FM input port. Logic “1” selects CDMA input.
SB
STBY
Logic “0” enables standby mode, which shuts down the VGA and
1
1
demodulator stages, leaving the VCO locked and the registers
active.
SD
SHDN
1
0
Logic “0” enables register-based shutdown. This mode shuts down
everything except the M and R latches and the serial bus.
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