M7020R
SEARCH-Successful Registers (SSR[0:7])
The device contains eight search successful reg-
isters (SSRs) to hold the index of the location
where a successful search occurred. The format of
each register is described in Table 9. The
SEARCH command specifies which SSR stores
the index of a specific SEARCH command in Cy-
cle B of the SEARCH Instruction. Subsequently,
the host ASIC can use this register to access that
data array, mask array, or external SRAM using
the index as part of the indirect access address
(see Table 19, page 32 and Table 22, page 35).
The device with a valid bit set performs a READ or
WRITE operation. All other devices suppress the
operation.
Table 9. SEARCH-Successful Register (SSR) Description
Field
Range
Initial Value
Description
INDEX
[14:0]
Index. This is the address of the 68-bit entry where a successful
search occurs. The device updates this field only when a search is
X
successful. If a hit occurs in a 136-bit entry-size quadrant, the LSB is
’0.’ If a hit occurs in a 272-bit entry size quadrant, the two LSBs are
’00.’ This index updates if the device is either a local or global winner
in a SEARCH operation.
–
[30:15]
0
Reserved.
VALID
[31]
Valid. During SEARCH operation in a depth-cascaded configuration,
0
the device that is a global winner in a match sets this bit to '1.' This bit
updates only when the device is a global winner in a SEARCH
operation.
–
[67:32]
0
Reserved.
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