M50LPW002
Table 3. Memory Identification Input Configuration
Memory Number
ID3
ID2
ID1
ID0
A21 A20 A19 A18
1 (Boot)
VIL or floating VIL or floating VIL or floating VIL or floating 1
1
1
1
2
VIL or floating VIL or floating VIL or floating
VIH
1
1
1
0
3
VIL or floating VIL or floating
VIH
VIL or floating 1
1
0
1
4
VIL or floating VIL or floating
VIH
VIH
1
1
0
0
5
VIL or floating
VIH
VIL or floating VIL or floating 1
0
1
1
6
VIL or floating
VIH
VIL or floating
VIH
1
0
1
0
7
VIL or floating
VIH
VIH
VIL or floating 1
0
0
1
8
VIL or floating
VIH
VIH
VIH
1
0
0
0
9
VIH
VIL or floating VIL or floating VIL or floating 0
1
1
1
10
VIH
VIL or floating VIL or floating
VIH
0
1
1
0
11
VIH
VIL or floating
VIH
VIL or floating 0
1
0
1
12
VIH
VIL or floating
VIH
VIH
0
1
0
0
13
VIH
VIH
VIL or floating VIL or floating 0
0
1
1
14
VIH
VIH
VIL or floating
VIH
0
0
1
0
15
VIH
VIH
VIH
VIL or floating 0
0
0
1
16
VIH
VIH
VIH
VIH
0
0
0
0
Table 4. Block Addresses
Size
(Kbytes)
Address Range
Block
Number
Block Type
16 3C000h-3FFFFh
6
Boot Block
(Top)
8
3A000h-3BFFFh
5
Parameter
Block
8
38000h-39FFFh
4
Parameter
Block
32 30000h-37FFFh
3
Main Block
64 20000h-2FFFFh
2
Main Block
64 10000h-1FFFFh
1
Main Block
64 00000h-0FFFFh
0
Main Block
Note: For A18 and A19 values, refer to Table 3.
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