M41T64Q6F(2004) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

M41T64Q6F
(Rev.:2004)

Serial Access Real-Time Clock with Alarms

STMicroelectronics 

M41T62/63/64/65

WRITE Mode

In this mode the master transmitter transmits to

the M41T6X slave receiver. Bus protocol is shown

in Figure 19., page 11. Following the START con-

dition and slave address, a logic '0' (R/W=0) is

placed on the bus and indicates to the addressed

device that word address “An” will follow and is to

be written to the on-chip address pointer. The data

word to be written to the memory is strobed in next

and the internal address pointer is incremented to

the next address location on the reception of an

acknowledge clock. The M41T6X slave receiver

will send an acknowledge clock to the master

transmitter after it has received the slave address

see Figure 16., page 9 and again after it has re-

ceived the word address and each data byte.

Figure 19. WRITE Mode Sequence

BUS ACTIVITY:

MASTER

SDA LINE

S

WORD

ADDRESS (An)

DATA n

DATA n+1

DATA n+X P

BUS ACTIVITY:

SLAVE

ADDRESS

AI00591

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