LH543621M-15 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

MFG CO.

LH543621M-15

512 × 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO

Sharp Electronics 

LH543611/21

TIMING DIAGRAMS (cont’d)

512 x 36 x 2/1024 x 36 x 2 BiFIFOs

CKA (CKB)

tRWS

Outside the 'almost-empty' region,

acknowledge is continuous

for a continuous request.

** * *

Starting at the third cycle after entering the

'almost-empty' region, acknowledge

occurs on every third cycle to prevent underrun

of the empty condition.

*

R/WA (R/WB)

tRQS

REQ A (REQB)

t ACK

t ACK

t ACK

t ACK

ACK A (ACKB)1

t AE

2

AE2 (AE1)

NOTES:

1. For a FIFO access to occur, REQ and EN must be held HIGH for the required setup and hold times.

2. ACK can be tied directly to EN to directly gate FIFO accesses.

* Indicates where a read would take place, if ACK were tied to EN.

3. REQ must be maintained HIGH with R/W stable throughout entire clock cycle for ACK to be generated.

4. When the REQ/ACK handshake is not used, ACK can be ignored,

and REQ may be tied HIGH or used as a second enable.

5. Parameters without parentheses apply to Port A. Parameters with parentheses apply to Port B.

Figure 40. Read Request/Acknowledge Handshake

543611-42

52

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