LTC6908-1 View Datasheet(PDF) - Linear Technology

Part Name

Description

MFG CO.

LTC6908-1

Resistor Set SOT-23 Oscillator with Spread Spectrum Modulation

Linear Technology 

LTC6908-1/LTC6908-2

APPLICATIO S I FOR ATIO

and load response are maintained while peak electromag-

netic radiation (or conduction) is reduced. Output ripple

may be somewhat increased, but its behavior is very much

like noise and its system impact is benign.

Figure 7 shows start-up times for various RSET resistors.

An internal counter mutes the outputs for the first 64 clock

cycles after power-up, ensuring that the first clock cycle

is close to the desired operating frequency.

HIGH FREQUENCY REJECTION

Using the LTC6908 in spread spectrum mode naturally

eliminates any concerns for output frequency accuracy

and stability as it is continually hopping to new settings.

In fixed frequency applications however, some attention to

V+ supply voltage ripple is required to minimize additional

output frequency error. Ripple frequency components on

the supply line near the programmed output frequency of

the LTC6908 in excess of 30mVP-P could create an addi-

tional 0.2% of frequency error. In applications where a fixed

frequency LTC6908 output clock is used to synchronize

the same switching regulator that provides the V+ supply

to the oscillator, noticeable jitter of the clock may occur

if the ripple exceeds 30mVP-P.

JITTER

The Peak-to-Peak Jitter vs Output Frequency graph, in

the Typical Performance Characteristics section, shows

the typical clock jitter as a function of oscillator frequency

and power supply voltage. These specifications assume

that the capacitance on SET is limited to less than 10pF,

as suggested in the Pin Functions description. If this

requirement is not met, the jitter will increase.

10000

VTA+

=

=

25°C

3V

1000

START-UP TIME

The start-up time and settling time to within 1% of the final

value can be estimated by tSTART ≈ RSET • (2.5µs/k) + 10µs.

For instance, with RSET = 100k, the LTC6908 will settle to

within 1% of its 1MHz final value in approximately 260µs.

100

10

1k

10k

100k

RSET (Ω)

1M

10M

690812 F07

Figure 7. Start-Up Time

690812fa

11

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