LTC2240UP-10 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC2240UP-10 Datasheet PDF : 28 Pages
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LTC2240-10
APPLICATIONS INFORMATION
1.25V
TIE TO VDD FOR 2V RANGE;
TIE TO VCM FOR 1V RANGE;
RANGE = 2 • VSENSE FOR
0.5V < VSENSE < 1V
1μF
LTC2240-10
VCM
2.2μF
2Ω 1.25V BANDGAP
REFERENCE
1V 0.5V
SENSE
REFLB
0.1μF
REFHA
RANGE
DETECT
AND
CONTROL
BUFFER
INTERNAL ADC
HIGH REFERENCE
2.2μF
1μF
REFLA
0.1μF
REFHB
DIFF AMP
INTERNAL ADC
LOW REFERENCE
Figure 9. Equivalent Reference Circuit
224010 F09
1.25V
8k
0.75V
12k
VCM
2.2μF
SENSE LTC2240-10
1μF
224010 F10
Figure 10. 1.5V Range ADC
Other voltage ranges in between the pin selectable ranges
can be programmed with two external resistors as shown
in Figure 10. An external reference can be used by ap-
plying its output directly or through a resistor divider to
SENSE. It is not recommended to drive the SENSE pin
with a logic device. The SENSE pin should be tied to the
appropriate level as close to the converter as possible. If
the SENSE pin is driven externally, it should be bypassed
to ground as close to the device as possible with a 1μF
ceramic capacitor.
Input Range
The input range can be set based on the application.
The 2V input range will provide the best signal-to-noise
performance while maintaining excellent SFDR. The 1V
input range will have better SFDR performance, but the
SNR will degrade by 1.7dB. See the Typical Performance
Characteristics section.
Driving the Encode Inputs
The noise performance of the LTC2240-10 can depend
on the encode signal quality as much as on the analog
input. The ENC+/ENC– inputs are intended to be driven
differentially, primarily for noise immunity from com-
mon mode noise sources. Each input is biased through
a 4.8k resistor to a 1.5V bias. The bias resistors set the
DC operating point for transformer coupled drive circuits
and can set the logic threshold for single-ended drive
circuits.
Any noise present on the encode signal will result in ad-
ditional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies) take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude as possible; if transformer
coupled use a higher turns ratio to increase the ampli-
tude.
3. If the ADC is clocked with a sinusoidal signal, filter the
encode signal to reduce wideband noise.
4. Balance the capacitance and series resistance at both
encode inputs so that any coupled noise will appear at both
inputs as common mode noise. The encode inputs have a
common mode range of 1.2V to 2.0V. Each input may be
driven from ground to VDD for single-ended drive.
18
224010fb
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