LH28F320BFHG-PTTLZK View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
LH28F320BFHG-PTTLZK Datasheet PDF : 36 Pages
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LHF32FDJ
20
DC Characteristics (Continued)
VCC=2.7V-3.6V
Symbol
Parameter
Notes Min. Typ. Max. Unit
Test Conditions
VIL
Input Low Voltage
5 -0.4
0.4
V
VIH
Input High Voltage
5
2.4
VCCQ
V
+ 0.4
VOL
Output Low Voltage
5
VCC=VCCMin.,
0.2
V VCCQ=VCCQMin.,
IOL=100µA
VOH Output High Voltage
5
VCCQ
-0.2
VCC=VCCMin.,
V VCCQ=VCCQMin.,
IOH=-100µ A
VPPLK
VPP Lockout during Normal
Operations
3,5,6
0.4
V
VPP during Block Erase, Full Chip
VPPH1 Erase, (Page Buffer) Program or OTP 6 1.65 3.0 3.6
V
Program Operations
VPP during Block Erase, Full Chip
VPPH2 Erase, (Page Buffer) Program or OTP 6 11.7 12 12.3
V
Program Operations
VLKO VCC Lockout Voltage
1.5
V
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values are the reference values at VCC=3.0V and TA=+25°C
unless VCC is specified.
2. ICCWS and ICCES are specified with the device de-selected. If read or (page buffer) program is executed while in block
erase suspend mode, the device’s current draw is the sum of ICCES and ICCR or ICCW. If read is executed while in (page
buffer) program suspend mode, the device’s current draw is the sum of ICCWS and ICCR.
3. Block erase, full chip erase, (page buffer) program and OTP program are inhibited when VPP≤VPPLK, and not guaranteed
in the range between VPPLK(max.) and VPPH1(min.), between VPPH1(max.) and VPPH2(min.) and above VPPH2(max.).
4. The Automatic Power Savings (APS) feature automatically places the device in power save mode after read cycle
completion. Standard address access timings (tAVQV) provide new data when addresses are changed.
5. Sampled, not 100% tested.
6. VPP is not used for power supply pin. With VPP≤VPPLK, block erase, full chip erase, (page buffer) program and OTP
program cannot be executed and should not be attempted.
Applying 12V±0.3V to VPP provides fast erasing or fast programming mode. In this mode, VPP is power supply pin and
supplies the memory cell current for block erasing and (page buffer) programming. Use similar power supply trace widths
and layout considerations given to the VCC power bus.
Applying 12V±0.3V to VPP during erase/program can only be done for a maximum of 1,000 cycles on each block. VPP
may be connected to 12V±0.3V for a total of 80 hours maximum.
7. The operating current in dual work is the sum of the operating current (read, erase, program) in each plane.
Rev. 2.44
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