LC7185-8750(1998) View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
MFG CO.
LC7185-8750 Datasheet PDF : 12 Pages
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LC7185-8750
Allowable Operating Conditions at Ta = –40 to +85°C, VSS = 0 V
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
Output voltage
Input frequency
Input amplitude
Required oscillating
frequency
Symbol
VDD
VIH1
VIH2
VIH3
VIL1
VIL2
VIL3
VOUT1
VOUT2
fIN1
fIN2
VIN1
VIN2
X’tal
Conditions
Pins HOLD, TX
Pin INIT
Pins KI1, KI2, KI3, KI4
Pins HOLD, TX
Pin INIT
Pins KI1, KI2, KI3, KI4
Pins SA, SB, SC, SD, SE, SF, SG, D1, D2
Pins UL, BEEP
Pin XIN (sine wave, capacitor coupled)
Pin PIN (sine wave, capacitor coupled)
Pin XIN (sine wave, capacitor coupled)
Pin PIN (sine wave, capacitor coupled)
Pins XIN, XOUT (CI % 50 Ω)
min
5.0
0.7VDD
3.2
0.6VDD
0
0
0
0
0
1.0
10
0.5
0.15
5.0
Electrical Characteristics at under allowable operating conditions
typ
10.24
10.24
max
8.0
12
VDD
VDD
0.3VDD
1.3
0.4VDD
13
8
15
30
1.5
1.5
15
Unit
V
V
V
V
V
V
V
V
V
MHz
MHz
Vrms
Vrms
MHz
Parameter
Internal feedback resistance
Pull-down resistor
Input high-level current
Input low-level current
Output high-level voltage
Output low-level voltage
Output leakage current
High-level tristate leakage
current
Low-level tristate leakage
current
Supply current
Symbol
Rf1
Rf2
RpdN
IIH1
IIH2
IIH3
IIH4
IIL1
IIL2
IIL3
IIL4
VOH1
VOH2
VOL1
VOL2
VOL3
VOL4
VOL5
VOL6
IOFF1
IOFF2
IOFFH
IOFFL
IDD1
IDD2
Conditions
Pin XIN
Pin PIN
Pins KI1, KI2, KI3, KI4, TEST
Pins HOLD, TX VI = 12 V
Pin INIT VI = VDD
Pin XIN VI = VDD
Pin PIN VI = VDD
Pins HOLD, TX VI = VSS
Pin INIT VI = VSS
Pin XIN VI = VSS
Pin PIN VI = VSS
Pins KO1, KO2, KO3 IO = 1 mA
Pin PD IO = 0.5 mA
Pins KO1, KO2, KO3 IO = 20 µA
Pin PD IO = 0.5 mA
Pin BEEP IO = 2 mA
Pins SA, SB, SC, SD, SE, SF, SG
IO = 20 mA
Pins D1, D2 IO = 5 mA
Pin UL IO = 10 mA
Pins SA, SB, SC, SD, SE, SF, SG, D1, D2
VO = 13 V
Pins UL, BEEP VO = 8 V
Pin PD VO = VDD
Pin PD VO = VSS
Normal mode
*1 (PLL operates)
Hold mode VDD = 3.2 V
*2 (memory backup)
VDD = 8.0 V
min
typ
max
Unit
1.0
MΩ
500
kΩ
30
50
70 kΩ
5.0 µA
5.0 µA
25 µA
50 µA
5.0 µA
5.0 µA
25 µA
50 µA
VDD–2.0 VDD–1.0 VDD–0.5
V
VDD–1.0
V
0.6
1.0
1.4
V
1.0
V
1.0
V
1.0
V
1.0
V
1.0
V
5.0 µA
5.0 µA
0.01
10.0 nA
0.01
10.0 nA
5
10 mA
5 µA
15 µA
*1: fIN2 = 20 MHz (PIN)
VIN2 = 0.15 Vrms
X’tal = 10.240 MHz
TX = HOLD = INIT = VDD
Other inputs = VSS
Other outputs = open
*2: HOLD = VSS
TX = INIT = VDD
Other inputs = VSS
Other outputs = open
Note: Be careful that the dielectric strength of pins SA, SB, SC, SD, SE, SF, D1, D2, UL, BEEP are weak.
No. 3356-2/12
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