IRL630
D.U.T
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
RG
• dv/dt controlled by R G
• Driver same type as D.U.T.
VDD
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS