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IN74ACT112N View Datasheet(PDF) - IK Semicon Co., Ltd

Part Name
Description
MFG CO.
IN74ACT112N
IKSEMICON
IK Semicon Co., Ltd 
IN74ACT112N Datasheet PDF : 6 Pages
1 2 3 4 5 6
TECHNICAL DATA
Dual J-K Flip-Flop
with Set and Reset
High-Speed Silicon-Gate CMOS
IN74ACT112
The IN74ACT112 is identical in pinout to the LS/ALS112,
HC/HCT112. The IN74ACT112 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
Each flip-flop is negative-edge clocked and has active-low
asynchronous Set and Reset inputs.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 μA; 0.1 μA @ 25°C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT112N Plastic
IN74ACT112D SOIC
TA = -40° to 85° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=VCC
PIN 8 = GND
FUNCTION TABLE
Inputs
Outputs
Set Reset Clock J K
Q
Q
L
H
X
XX H
L
H
L
L
L
X
XX L
H
X
XX
L*
L*
H
H
L L No Change
H
H
LH L
H
H
H
HL H
L
H
H
HH
Toggle
H
H
L
X X No Change
H
H
H
X X No Change
H
H
X X No Change
* Both outputs will remain low as long as Set and Reset are
low, but the output states are unpredictable if Set and Reset
go high simultaneously
X = Don’t Care
Rev. 00

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