IDT7008S25GJB View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
MFG CO.
IDT7008S25GJB Datasheet PDF : 19 Pages
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IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(6,7)
7008X20
Com'l Only
7008X25
Com'l &
Military
7008X35
Com'l &
Military
7008X55
Com'l, Ind &
Military
Symbol
Parameter
BUSY TIMING (M/S=VIH)
tBAA
BUSY Access Time from Address Match
tBDA
BUSY Disable Time from Address Not Matched
tBAC
BUSY Access Time from Chip Enable Low
tBDC
BUSY Access Time from Chip Enable High
tAPS
Arbitration Priority Set-up Time(2)
tBDD
BUSY Disable to Valid Data(3)
tWH
Write Hold After BUSY(5)
BUSY TIMING (M/S=VIL)
tWB
BUSY Input to Write(4)
tWH
Write Hold After BUSY(5)
Min. Max. Min. Max. Min. Max. Min. Max. Unit
____
20
____
20
____
20
____
45
ns
____
20
____
20
____
20
____
40
ns
____
20
____
20
____
20
____
40
ns
____
17
____
17
____
20
____
35
ns
5
____
5
____
5
____
5
____
ns
____
20
____
25
____
35
____
55
ns
15
____
17
____
25
____
25
____
ns
0
____
0
____
0
____
0
____
ns
15
____
17
____
25
____
25
____
ns
PORT-TO-PORT DELAY TIMING
tWDD
Write Pulse to Data Delay(1)
tDDD
Write Data Valid to Read Data Delay(1)
____
45
____
50
____
60
____
80
ns
____
30
____
35
____
45
____
65
ns
NOTES:
3198 tbl 14
1. Port-to-port delay through RAM cells from writing port to reading port, refer to "Timing Waveform of Write with Port-to-Port Read and BUSY (M/S = VIH)".
2. To ensure that the earlier of the two ports wins.
3. tBDD is a calculated parameter and is the greater of 0, tWDD – tWP (actual) or tDDD – tDW (actual).
4. To ensure that the write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
6. 'X' in part numbers indicates power rating (S or L).
7. Industrial Temperature: for other speeds, packages and powers contact your sales office.
12
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