Integrated
Circuit
Systems, Inc.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
CPD
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Power Dissipation Capacitance
(per output)
ICS8516I
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
KΩ
KΩ
4
pF
TABLE 3A. CONTROL INPUT FUNCTION TABLE
Inputs
Outputs
OE1
OE2
Q0:Q7
nQ0:nQ7
Q8:Q15
nQ8:nQ15
0
0
Hi Z
Hi Z
Hi Z
Hi Z
1
0
ACTIVE
ACTIVE
Hi Z
Hi Z
0
1
Hi Z
Hi Z
ACTIVE
ACTIVE
1
1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
In the active mode, the state of the outputs are a function of the CLK and nCLK inputs as described in Table 3B.
TABLE 3B. CLOCK INPUT FUNCTION TABLE
Inputs
CLK
nCLK
Outputs
Q0:Q15
nQ0:nQ15
Input to Output Mode
Polarity
0
1
LOW
HIGH
Differential to Differential
Non Inverting
1
0
HIGH
LOW
Differential to Differential
Non Inverting
0
Biased; NOTE 1
LOW
HIGH
Single Ended to Differential Non Inverting
1
Biased; NOTE 1
HIGH
LOW
Single Ended to Differential Non Inverting
Biased; NOTE 1
0
HIGH
LOW
Single Ended to Differential
Inverting
Biased; NOTE 1
1
LOW
HIGH
Single Ended to Differential
Inverting
NOTE 1: Please refer to the Application Information section, "Wiring the Differential Input to Accept Single Ended Levels".
8516FYI
www.icst.com/products/hiperclocks.html
3
REV. A JULY 30, 2004