HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
Registered DDR2 SDRAM Modules
7.0 Package Outline
7.1 Raw Card A
Module Package
DDR2 Registered DIMM Modules Raw Card A
one physical rank, 9 components x8 organised
4.0
5,175
pin 1
pin 121
133.35 +- 0.15
Front View
PLL
64 65
63,0
5.0
Backside View
184 185
2.7 max.
55,0
120
5,175 1.27 +- 0.1
PCB warpage 0.40
240
3
Detail of Contacts A
0.8 +- 0.05
1.0
3
Detail of Contacts B
5.0
0.75R
1.5
2.5
note: all outline dimensions and tolerances are in accordance with the JEDEC standard (MO-237)
Data Sheet
Preliminary
27
Rev. 0.85, 2004-04