HPL1117
Block Diagram
V IN
VOUT
T herm al
Protection
Current
Lim it
Voltage
Regulation
ADJ/GND
Application Circuits
1.25V to 10.7V Adjustable Regulator
Improving Ripple Rejection
HPL1117
VIN
IN
OUT
ADJ
R1
121Ω
+ 10µ F
C1*
R2
1k
VOUT1
+ 100µ F
C2
* Needed if device is far from filter capacitors
VOUT
=
1.250V
X
R1 + R2
R1
VIN
+
10µF
HPL1117
IN OUT
ADJ
R2
365Ω
1%
R1
121Ω
1%
+ C1
10µF
VOUT
150µF
* C1 improves ripple rejection.
XC should be approximately
equal to R1 at ripple frequency
Copyright HIPAC Semiconductor, Inc.
5
Rev. B.13 - Mar., 2004
www.hipacsemi.com