HDM8515 View Datasheet(PDF) - Hynix Semiconductor

Part Name

Description

MFG CO.

HDM8515

DVB/DSS Compliant Receiver

Hynix Semiconductor 

6.2 Read Registers

ADDRESS (Hex)

00

Narrowband AGC Accumulator

The current value of the 8 bit AGC accumulator may be read from this

location.

01, 02, 03

04, 05, 06

07

Symbol Timing Frequency Accumulator

The current value of the 24 bit frequency accumulator in the symbol timing

loop filter may be read from these 3 locations.

Phase Tracking Frequency Accumulator

The current value of the 24 bit frequency accumulator in the carrier phase

loop filter may be read from these 3 locations.

QPSK Lock Status

Bit 0. QPSK Lock Flag

When this bit is set to one, the QPSK demodulator is phase locked.

08

Wide Band AGC Accumulator

This eight bit value represents the most significant bits of the accumulator

in the first order wideband AGC loop. This data only has meaning when

the wideband AGC is in Mode 0.

09, 0A

Sweep Frequency

The 16 bit sweep accumulator is available at this location. Bit 7 of address

09 is the MSB and bit 0 of address 0A is the LSB. The receiver frequency

is determined by adding the Sweep Frequency with the carrier frequency

accumulator (read addresses 04, 05 and 06) and the nominal carrier start

frequency (write addresses 04, 05 and 06).

0B

In-Phase

The six LSB bit output of the In-phase baseband filter is available at this

location. This data is updated once per symbol.

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