Package Characteristics
Over recommended operating conditions (TA = -55 to +125°C) unless otherwise specified.
Parameter
Input-Output
Leakage Current
Symbol
II-O
Resistance
RI-O
(Input-Output)
Capacitance
CI-O
(Input-Output)
*All typicals at TA = 25°C.
Test Conditions
VI-O = 1500Vdc
RH = 45%,
t = 5 sec.,
TA = 25°C
VI-O = 500 VDC
Group A
Limits
Subgroups
Units Fig. Note
(13)
Min. Typ.* Max.
1.0 µA
5, 6
1
1010
Ω
6
f = 1 MHz
2.34
pF
6
Notes:
1. Maximum pulse width = 10 µs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak minimum
= 0.5 A. See Applications section for additional details on limiting IOH peak.
2. Maximum pulse width = 50 µs, maximum duty cycle = 0.5%.
3. In this test VOH is measured with a dc load current. When driving capacitive loads VOH will approach VCC as IOH approaches zero amps.
4. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
5. This is a momentary withstand test, not an operating condition.
6. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together.
7. The difference between tPHL and tPLH between any two HCPL-5150 parts under the same test condition.
8. Pins 1 and 4 need to be connected to LED common.
9. Common mode transient immunity in the high state is the maximum tolerable |dVCM/dt| of the common mode pulse, VCM, to assure that the output will
remain in the high state (i.e., VO > 15.0 V).
10. Common mode transient immunity in a low state is the maximum tolerable |dVCM/dt| of the common mode pulse, VCM, to assure that the output will
remain in a low state (i.e., VO < 1.0 V).
11. This load condition approximates the gate load of a 1200 V/25 A IGBT.
12. Pulse Width Distortion (PWD) is defined as |tPHL-tPLH| for any given device.
13. Standard parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD and Class H parts receive 100% testing at 25, 125 and -55°C (Subgroups 1 and 9,
2 and 10, 3 and 11, respectively).
14. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits specified for
all lots not specifically tested.
7