GS9002A PIN DESCRIPTIONS (Continued)
PIN NO SYMBOL TYPE
DESCRIPTION
37
VEE
38,39 SDO/SDO O
40
41
42,43
VCC2b
VCC2a
SCK/SCK O
44
VEE
Power Supply: Most negative power supply connection.
Serial Data Outputs (true and inverse). Pseudo-ECL differential outputs representing the serialized
data. These outputs require 390Ω pull down resistors.
Power Supply: Most positive power supply connection for the Serial Data ECL output buffers.
Power Supply: Most positive power supply connection for the Serial Clock ECL output buffers.
Serial Clock Outputs (inverse and true). Pseudo-ECL differential outputs of the Serial Clock (10x
Parallel Clock). These outputs require 390Ω pull-down resistors.
Power Supply: Most negative power supply connection.
INPUT / OUTPUT CIRCUITS
5k
VCC
SYNC DET
1k
INPUT
VCC
1k
VR1
VEE
Fig. 2 Pin No. 3
Sync Detect
VCC
1k
1k
VCC
PCK OUT
VEE
Fig. 3 Pins No. 6, 7 - 16, 17,26
Sync Disable, Parallel Data, Parallel Clock,
Scrambler/Serializer Select
VCC
10k
LOCK
DETECT
24149 - 1
Fig. 4 Pin No. 19
Parallel Clock Out
VEE
6 of 11
VEE
Fig. 5 Pin No. 20
Lock Detect