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74F670 View Datasheet(PDF) - Philips Electronics

Part Name
Description
MFG CO.
74F670
Philips
Philips Electronics 
74F670 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
4 x 4 register file (3-State)
Product specification
74F670
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST
CONDITION
tPLH
tPHL
Propagation delay
RA, RB to Qn
Waveform 3, 4
tPLH
tPHL
Propagation delay
WE to Qn
Waveform 1, 2
tPLH
tPHL
Propagation delay
Dn to Qn
Waveform 1, 2
tPZH
RE Enable time
Waveform 5
tPZL
Qn to High or Low level Waveform 6
tPHZ
RE Disable time
Waveform 5
tPLZ
Qn to High or Low level Waveform 6
LIMITS
Tamb= +25°C
VCC = +5.0V
CL = 50pF,
RL = 500
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500
MIN
TYP
MAX
MIN
MAX
3.5
5.5
9.0
3.0
10.0
4.0
5.5
8.5
3.5
9.9
5.0
7.0
10.0
4.5
11.0
6.5
8.5
11.5
6.0
12.5
3.5
6.0
8.5
3.0
9.5
6.0
8.0
11.0
5.5
12.5
3.0
7.0
12.0
2.5
13.0
4.5
6.5
9.0
4.0
10.0
2.0
3.0
6.5
1.5
7.5
3.0
5.0
8.5
3.0
8.5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500
MIN
MAX
UNIT
ts(H)
ts(L)
Setup time, High or Low
Dn to positive going WE
Waveform 3, 4
1.5
6.0
1.5
ns
7.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to positive going WE
Waveform 3, 4
0
1.0
0
ns
1.0
ns
ts(H)
ts(L)
Setup time, High or Low
WA, WB to negative going WE1
Waveform 3, 4
0
0
0
ns
0
ns
th(H)
th(L)
Hold time, High or Low
WA, WB to negative going WE1
Waveform 3, 4
0
0
0
ns
0
ns
tw(L)
WE Pulse width, Low
Waveform 3, 4
6.5
8.5
ns
NOTES:
1. Write Address (WA, WB) setup time will protect the data written into the previous address. If protection of data in the previous address is not
required, setup time for Write Address to WE can be ignored. Any address selection sustained for the final 7ns of the WE pulse during hold
time for Write Address to WE will result in data being written into that location.
1990 Jul 12
6

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