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EN25Q128-104FIP View Datasheet(PDF) - Eon Silicon Solution Inc.

Part Name
Description
MFG CO.
EN25Q128-104FIP
Eon
Eon Silicon Solution Inc. 
EN25Q128-104FIP Datasheet PDF : 57 Pages
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Software Reset Flow
Initial
Command
No
= 66h ?
Yes
Reset enable
Command
No
= 99h ?
Yes
Reset start
EN25Q128
WIP = 0 ?
Yes
Reset done
No
Embedded
Reset Cycle
Note:
1. Reset-Enable (RSTEN) (66h) and Reset (RST) (99h) commands need to match standard SPI or
EQPI (Quad) mode.
2. Continue (Enhance) EB mode need to use quad Reset-Enable (RSTEN) (66h) and quad Reset (RST)
(99h) commands.
3. If user is not sure it is in SPI or Quad mode, we suggest to execute sequence as follows:
Quad Reset-Enable (RSTEN) (66h) -> Quad Reset (RST) (99h) -> SPI Reset-Enable (RSTEN) (66h)
-> SPI Reset (RST) (99h) to reset.
4. The reset command could be executed during embedded program and erase process, EQPI mode
and Continue EB mode to back to SPI mode.
5. This flow cannot release the device from Deep power down mode.
6. The Status Register Bit will reset to default value after reset done.
7. If user reset device during erase, the embedded reset cycle software reset latency will take about
28us in worst case.
This Data Sheet may be revised by subsequent versions
19
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. J, Issue Date: 2011/09/19
www.eonssi.com

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