Improved, 8-Channel/Dual 4-Channel,
CMOS Analog Multiplexers
_________________________________Test Circuits/Timing Diagrams (continued)
+15V
+2.4V
50Ω
V+
EN
S1-S8
+5V
A0
A1 DG408
A2
GND
D
V-
300Ω
-15V
VOUT
35pF
LOGIC +3V
INPUT
0V
VOUT
SWITCH
OUTPUT
0V
tR < 20ns
50%
tF < 20ns
80%
tOPEN
Figure 4. Break-Before-Make Interval
+15V
RS
S_
V+
EN
VS
A0
CHANNEL
D
SELECT
A1
A2 DG408
GND
V-
-15V
+3V
LOGIC
INPUT
OFF
ON
OFF
0V
VOUT
CL = 1000nF
VOUT
∆VOUT
∆VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER
ERROR Q WHEN THE CHANNEL TURNS OFF.
Q = CL = ∆VOUT
Figure 5. Charge Injection
8 _______________________________________________________________________________________