CY7C1329G-166AC View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
MFG CO.
CY7C1329G-166AC Datasheet PDF : 16 Pages
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CY7C1329G
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage on VDD Relative to GND........ –0.5V to +4.6V
DC Voltage Applied to Outputs
in Three-State ..................................... –0.5V to VDDQ + 0.5V
DC Input Voltage....................................–0.5V to VDD + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... >200 mA
Operating Range
Range
Commercial
Ambient
Temperature
0°C to +70°C
VDD
3.3V
–5%/+10%
VDDQ
2.5V –5%
to +5%
Electrical Characteristics Over the Operating Range[8, 9]
Parameter
Description
Test Conditions
Min.
VDD
VDDQ
VOH
VOL
VIH
VIL
IX
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage[8]
Input LOW Voltage[8]
Input Load Current
except ZZ and MODE
VDDQ = 2.5V, VDD = Min., IOH = –1.0 mA
VDDQ = 2.5V, VDD = Min., IOL = 1.0 mA
VDDQ = 2.5V
VDDQ = 2.5V
GND ≤ VI ≤ VDDQ
3.135
2.375
2.0
1.7
–0.3
–5
Input Current of MODE Input = VSS
–30
Input = VDD
Input Current of ZZ
Input = VSS
–5
Input = VDD
IOZ
Output Leakage Current GND ≤ VI ≤ VDDQ, Output Disabled
–5
IDD
VDD Operating Supply VDD = Max., IOUT = 0 mA,
6-ns cycle, 166 MHz
Current
f = fMAX = 1/tCYC
7.5-ns cycle,133 MHz
ISB1
Automatic CS
VDD = Max, Device Deselected, 6-ns cycle, 166 MHz
Power-down
VIN ≥ VIH or VIN ≤ VIL
7.5-ns cycle,133 MHz
Current—TTL Inputs f = fMAX = 1/tCYC
ISB2
Automatic CS
VDD = Max, Device Deselected, All speeds
Power-down
VIN ≤ 0.3V or
Current—CMOS Inputs VIN > VDDQ – 0.3V, f = 0
ISB3
Automatic CS
VDD = Max, Device Deselected, 6-ns cycle, 166 MHz
Power-down
or VIN ≤ 0.3V or
Current—CMOS Inputs VIN > VDDQ – 0.3V,
7.5-ns cycle,133MHz
f = fMAX = 1/tCYC
ISB4
Automatic CS
VDD = Max, Device Deselected, All speeds
Power-down
VIN ≥ VIH or VIN ≤ VIL, f = 0
Current—TTL Inputs
Notes:
8. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > –2V (Pulse width less than tCYC/2).
9. TPower-up: Assumes a linear ramp from 0v to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD
Max. Unit
3.6
V
2.625
V
V
0.4
V
VDD + 0.3V V
0.7
V
5
µA
µA
5
µA
µA
30
µA
5
µA
240
mA
225
mA
100
mA
90
mA
40
mA
85
mA
75
mA
45
mA
Document #: 38-05393 Rev. *A
Page 8 of 16
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