CXA1166K
Electrical Characteristics
(AVEE = DVEE = –5.2V, VRT, VRTS = 0V, VRB, VRBS = –2V, Ta = 25°C)
Item
Symbol
Condition
Resolution
DC characteristics
Integral linearity error
EIL
Differential linearity error
EDL
Analog input
Analog input capacitance
Analog input resistance
Input bias current
CIN
VIN = –1V + 0.07Vrms
RIN
VIN = –1V
IIN
VIN = –1V
Reference inputs
Reference resistance
Residual resistance∗1 r1
r2
r3
r4
r5
RREF
r1
r2
r3
r4
r5
Digital inputs
Logic High level
Logic Low level
Logic High current
Logic Low current
Input capacitance
VIH
VIL
IIH
VIH = –0.8V
IIL
VIL = –1.6V
Switching characteristics
Maximum conversion rate
Aperture jitter
Sampling delay
Output delay
Clock High pulse width
Clock Low pulse width
Fc
Taj
Tds
Tdo
TPW1
TPW0
RL = 50Ω to –2V
} TPW1 + TPW0 = 4.0ns
Digital output
Logic High level
Logic Low level
Output rise time
Output fall time
VOH RL = 50Ω to –2V
VOL
RL = 50Ω to –2V
Tr
RL = 50Ω to –2V
Tf
RL = 50Ω to –2V
Dynamic characteristics
Input bandwidth
SNR
Error rate
Differential gain error
Differential phase error
SNR
DG
DP
VIN=2Vp-p
{ Input = 1kHz, FS
Clock = 250MHz
{ Input = 62.499MHz, FS
Clock = 250MHz
{ Input = 49.999MHz, FS
Error > 16LSB
Clock = 200MHz
{ Input = 62.499MHz, FS
Error > 16LSB
Clock = 250MHz
} NTSC 40IRE mod.
ramp, Fc = 250MSPS
Power supply
Supply current
IEE
Power consumption∗3
Pd
∗1 See Block Diagram.
∗2 TPS: Times Per Sample
∗3 Pd = IEE • VEE + (VRT – VRB) 2
RREF
–6–
Min. Typ. Max. Unit
8
bits
±0.5 LSB
±0.5 LSB
18
pF
50 120
kΩ
20
450 µA
83
125 182
Ω
0.1
0.6
2.0
Ω
300 500 700 Ω
0.5
2.0
5.0
Ω
300 500 700 Ω
0.1
0.6
2.0
Ω
–1.13
V
–1.50 V
0
70 µA
–50
50 µA
4
pF
250
MSPS
9
ps
0.4
1.4
2.4
ns
1.8
2.5
3.2
ns
1.8
ns
1.8
ns
–1.00
V
–1.60 V
0.6 1.5 ns
0.6 1.5 ns
200
44
46
MHz
dB
30
35
dB
10–9 TPS∗2
10–8 10–6 TPS∗2
1.0
%
0.5
deg
–360 –270
mA
1.4 1.9 W