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CAT523 View Datasheet(PDF) - ON Semiconductor

Part Name
Description
MFG CO.
CAT523 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CAT523
Not Recommended for New Design
POTENTIOMETER CHARACTERISTICS
VDD = +2.7V to +5.5V, VREFH = VDD, VREFL = 0V, unless otherwise specified
Symbol Parameter
Conditions
Min
RPOT Potentiometer Resistance
See note 3
RPOT to RPOT Match
Pot Resistance Tolerance
Voltage on VREFH pin
2.7
Voltage on VREFL pin
0
Resolution
INL Integral Linearity Error
DNL Differential Linearity Error
ROUT
IOUT
Buffer Output Resistance
Buffer Output Current
TCRPOT TC of Pot Resistance
CH/CL Potentiometer Capacitances
Typ
24
±0.5
0.4
0.5
0.25
300
8/8
Max
±1
±20
VDD
VDD - 2.7
1
0.5
10
3
Units
k
%
%
V
V
%
LSB
LSB
mA
ppm/ºC
pF
AC ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +5.5V, VREFH = VDD, VREFL = 0V, unless otherwise specified
Symbol Parameter
Conditions
Min
Typ Max Units
Digital
tCSMIN
tCSS
tCSH
tDIS
tDIH
tDO1
tDO0
tHZ
tLZ
tBUSY
tPS
tPROG
tCLKH
tCLKL
fC
Minimum CS Low Time
CS Setup Time
CS Hold Time
DI Setup Time
DI Hold Time
Output Delay to 1
Output Delay to 0
Output Delay to High-Z
Output Delay to Low-Z
Erase/Write Cycle Time
PROG Setup Time
Minimum Pulse Width
Minimum CLK High Time
Minimum CLK Low Time
Clock Frequency
CL = 100pF (1)
150
ns
100
ns
0
ns
50
ns
50
ns
150
ns
150
ns
400
ns
400
ns
4
5
ms
150
ns
700
ns
500
ns
300
ns
DC
1
MHz
Analog
tDS DPP Settling Time to 1 LSB
CLOAD = 10pF, VDD = +5V
CLOAD = 10pF, VDD = +3V
3
10
µs
6
10
µs
Notes:
(1) All timing measurements are defined at the point of signal crossing VDD / 2.
(2) These parameters are periodically sampled and are not 100% tested.
(3) The 24k+20% resistors are configured as 4 resistors in parallel which would provide a measured value between VREFH and VREFL of 6k
+20%. The individual 24kresistors are not measurable but guaranteed by design and verification of the 6k+20% value.
Doc. No. MD-2005 Rev. I
4
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice

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