C8051F3201 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051F3201

Full Speed USB, 16 k ISP FLASH MCU Family

Silicon Laboratories 

C8051F320/1

PROGRAM/DATA MEMORY

(Flash)

0x3E00

0x3DFF

RESERVED

0xFF

0x80

0x7F

16 K Flash

(In-System

Programmable in 512

Byte Sectors)

0x30

0x2F

0x20

0x1F

0x00

DATA MEMORY (RAM)

INTERNAL DATA ADDRESS SPACE

Upper 128 RAM

(Indirect Addressing

Only)

Special Function

Register's

(Direct Addressing Only)

(Direct and Indirect

Addressing)

Bit Addressable

General Purpose

Registers

Lower 128 RAM

(Direct and Indirect

Addressing)

0x0000

EXTERNAL DATA ADDRESS SPACE

0xFFFF

Same 2048 bytes as from

0x0000 to 0x07FF, wrapped

on 2 kB boundaries

0x0800

0x07FF

0x0400

0x03FF

0x0000

USB FIFOs

1024 Bytes

XRAM - 1024 Bytes

(accessable using MOVX

instruction)

Figure 1.4. On-Board Memory Map

1.3. Universal Serial Bus Controller

The Universal Serial Bus Controller (USB0) is a USB 2.0 compliant Full or Low Speed function with inte-

grated transceiver and endpoint FIFO RAM. A total of eight endpoint pipes are available: a bi-directional

control endpoint (Endpoint0) and three pairs of IN/OUT endpoints (Endpoints1-3 IN/OUT).

A 1k block of XRAM is used as dedicated USB FIFO space. This FIFO space is distributed among

Endpoints0–3; Endpoint1–3 FIFO slots can be configured as IN, OUT, or both IN and OUT (split mode).

The maximum FIFO size is 512 bytes (Endpoint3).

USB0 can be operated as a Full or Low Speed function. On-chip 4x Clock Multiplier and clock recovery cir-

cuitry allow both Full and Low Speed options to be implemented with the on-chip precision oscillator as the

USB clock source. An external oscillator source can also be used with the 4x Clock Multiplier to generate

the USB clock. The CPU clock source is independent of the USB clock.

20

Rev. 1.4

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