UDA1344TS/N2 View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
UDA1344TS/N2 Datasheet PDF : 28 Pages
| |||
Philips Semiconductors
Low-voltage low-power stereo audio
CODEC with DSP features
Product specification
UDA1344TS
handbook, full pagewidth
L3MODE
tstp(L3)
L3CLOCK
L3DATA
address
data byte #1
data byte #2
address
MGL725
Fig.6 Multibyte data transfer.
L3 interface registers
When the data transfer of type ‘status’ is selected, the features system clock frequency, data input format and DC filter
can be controlled.
Table 14 Data transfer of type ‘status’
BIT 7
0
BIT 6
0
BIT 5
SC1
BIT 4
SC0
BIT 3
IF2
BIT 2
IF1
BIT 1
IF0
BIT 0
REGISTER SELECTED
DC SC = system clock frequency (2 bits); see Table 16
IF = data input format (3 bits); see Table 17
DC = DC filter (1 bit); see Table 18
When the data transfer of type ‘data’ is selected, the features volume, bass boost, treble, de-emphasis, mute, mode and
power control can be controlled.
Table 15 Data transfer of type ‘data’
BIT 7
0
0
1
1
BIT 6
0
1
0
1
BIT 5
VC5
BB3
0
0
BIT 4
VC4
BB2
DE1
0
BIT 3
VC3
BB1
DE0
0
BIT 2
VC2
BB0
MT
0
BIT 1
VC1
TR1
M1
PC1
BIT 0
REGISTER SELECTED
VC0 VC = volume control (6 bits); see Table 19
TR0 BB = bass boost (4 bits); see Table 20
TR = treble (2 bits); see Table 21
M0 DE = de-emphasis (2 bits); see Table 22
MT = mute (1 bit); see Table 23
M = filter mode (2 bits); see Table 24
PC0 PC = power control (2 bits); see Table 25
2001 Jun 29
13
Share Link: 