AS4LC1M16S0-7TC View Datasheet(PDF) - Alliance Semiconductor

Part Name

Description

MFG CO.

AS4LC1M16S0-7TC

3.3V 2M × 8/1M × 16 CMOS synchronous DRAM

Alliance Semiconductor 

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Clock suspension write waveforms

CLK external

CLK internal

CKE

DQM

DQ

D1

D2

tCKH

tCKS

D3

D5

DQM Mask

CLK external

CLK internal

CKE

DQM

DQ D1

D2

D3

CLK external

CLK internal

CKE

DQM

DQ D1

D2

D3

Read/write interrupt timing

CLK

CMD

tCMS tCMH

Read data

Read data

ADD

DQ (CL1)

DQ (CL2)

A

B

QA0

DQ (CL3)

tCCD

tCCD = CAS to CAS delay (= 1 CLK).

DQM Mask

CKE Mask

tCMS

tCMH

D4

CKE Mask

QB0

QB1

QB2

QA0

QB0

QB1

QA0

QB0

AS4LC2M8S1

AS4LC1M16S1

D6

CKE Mask

D5

D6

D5

D6

read interrupted by read (BL = 4)

QB3

QB2

QB3

QB1

QB2

QB3

5/21/01; v.1.1

Alliance Semiconductor

P. 18 of 29

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