BD64550EFV
Technical Note
●Switching regulator operation
○Basic operation
A switching regulator circuit that repeats on/off being synchronized with internal CLK (200 KHz) is built-in.
The start up output voltage SWOUT (pin 12) becomes up and run step by step with soft start at the VM power-on
(VM≧VMPORH).The output voltage is determined by the equation below with external resistance.
VOUTDCDC=VBIAS・{(R1+R2)/R2 } [V]
The setting should be performed so that the switching regulator output voltage (VOUTDCDC) waveform is optimized within
the range of VOUTDCDC = 3V to 5V, VBIAS = 0.9V (Typ.), R1 + R2 = 1kΩ to 10kΩ, C1 = 1,000pF to 10,000pF.
DSEN
-
++
0.9V
BIAS
DAC
SWOFF
SS
COUNTER
200KHzCLK
DRIVER
CLK(=1.95kHz)
SWOUT
VOUTDCDC
R1
C1
DSEN
R2
Fig.22 Switching Regulator Block Diagram
Reference clock
(200kHz)
DUTY MAX
Output voltage
SWOUT
MAX_DUTY 92%
Fig.23 Timing Chart of Switching Regulator Operation
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2010.06 - Rev.A