AN671 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
AN671 Datasheet PDF : 6 Pages
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AN671
3. Crossbar Function
The primary function of a crossbar decoder is to route internal digital signals to Port Bank pins. Figure 2 is a block
diagram of crossbar 0 on SiM3U1xx devices. The inputs to the crossbar are a number of internal digital signals
inside the device. The XBAR0H, XBAR0L, and PBSKIP registers in the port configuration module (PBCFG) define
how the internal digital signals are mapped to the I/O pins of PB0 and PB1.
Highest
Priority
Lowest
Priority
USART0
RX/TX
Flow Control
Clock
SPI0
SCK/MISO/MOSI
NSS
USART1
RX/TX
Flow Control
Clock
EPCA0
“N” Channels
PCA0
“N” Channels
PCA1
“N” Channels
EPCA0
ECI
PCA0
ECI
PCA1
ECI
I2S0
TX
I2C0
SDA/SCL
CMP0
CMP0S
CMP0A
CMP1
CMP1S
CMP1A
TIMER0
T0CT
T0EX
TIMER1
T1CT
T1EX
UART0
RX/TX
Flow Control
UART1
RX/TX
SPI1
SCK/MISO/MOSI
NSS
SPI2
AHB
Clock
SCK/MISO/MOSI
NSS
Output ( 16)
Crossbar 0
PB0.0
16
Port
I/O
Cells
Digital
Crossbar 0
PB0.15
PB1.0
16
Port
I/O
Cells
PB1.15
Priority
Decoder
Not all Port I/O pins are
available on all packages.
XBAR0H
XBAR0L
PBSKIP
Port Match
PM
PMMSK
Figure 2. Example Routing of Internal Digital Signals to Port Banks on SiM3U1xx Devices
2
Rev. 0.1
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