ADV7152L View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

ADV7152L

CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC

Analog Devices 

ADV7152

COMMAND REGISTER 2 (CR2)

(Address Reg (A7–A0) = 06H)

This register contains a number of control bits as shown in the

diagram. CR2 is a 10-bit wide register. However for program-

ming purposes, it may be considered as an 8-bit wide register

(CR28 and CR29 are both reserved).

IPLL Trigger Control (CR21)

This bit specifies whether the IPLL output is triggered from

BLANK or SYNC.

SYNC Recognition Control (CR22)

This bit specifies whether the video SYNC input is to be

encoded onto the IOG analog output or ignored.

The diagram shows the various operations under the control of

CR2. This register can be read from as well written to. In read

mode, CR28 and CR29 are both returned as zeros.

Pedestal Enable Control (CR23)

This bit specifies whether a 0 IRE or a 7.5 IRE blanking pedes-

tal is to be generated on the video outputs.

COMMAND REGISTER 2 BIT DESCRIPTION

True-Color/Pseudo-Color Mode Control (CR27–CR24)

These 4 bits specify the various color modes. These include a

OBSOLETE R7 Trigger Polarity Control (CR20)

This bit determines whether the pixel data is latched into the

test registers on the rising or falling edge of R7, see “Test Diag-

nostics” section in Appendix 3.

24-bit true-color mode, two 15-bit true-color modes and three

8-bit pseudo color modes.

CR29 CR28 CR27 CR26 CR25 CR24 CR23 CR22 CR21 CR20

RESERVED *

* THESE BITS ARE READ–ONLY

RESERVED BITS.

A READ CYCLE WILL

RETURN ZEROS "00."

PEDESTAL

ENABLE

CONTROL

CR23

0 0 IRE

1 7.5 IRE

TRUE-COLOR / PSEUDO-COLOR MODE CONTROL

CR27 CR26 CR25 CR24 COLOR MODE

0

0

0

0 8-BIT PSEUDO COLOR ON R7–R0

0

1

0

0 8-BIT PSEUDO COLOR ON G7–G0

SYNC

RECOGNITION

CONTROL

CR22

0 IGNORE

1 DECODE

IPLL TRIGGER

CONTROL

CR21

0

SYNC

1

0

0

0 8-BIT PSEUDO COLOR ON B7–B0

1

1

0

0 15-BIT TRUE COLOR ON

1

BLANK

R7–R3, G7–G3,B7–B3

1

1

0

1 15-BIT TRUE COLOR ON

R7–R0, G6–G0

1

1

1

0 24-BIT TRUE COLOR

R7 TRIGGER

POLARITY CONTROL

R7–R0, G7–G0, B7–B0

CR20

0

1

Command Register 2 (CR2) (CR29–CR20)

–20–

REV. B

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