SERIAL INTERFACE
There are two serial interfaces that can be used on this part, I2C
and SPI. The device powers up with the serial interface in I2C
mode, but it is not locked into this mode. To stay in I2C mode, it
is recommended that the user tie the CS line to either VCC or
GND. It is not possible to lock the I2C mode, but it is possible to
select and lock the SPI mode.
To select and lock the interface into the SPI mode, a number of
pulses must be sent down the CS line (Pin 4). The following
section describes how this is done.
Once the SPI communication protocol has been locked in, it
cannot be unlocked while the device is still powered up. Bit D0
of the SPI lock status register (Address 0x7F) is set to 1 when a
successful SPI interface lock has been accomplished. To reset
the serial interface, the user must power down the part and
power it up again. A software reset does not reset the serial
interface.
Serial Interface Selection
The CS line controls the selection between I2C and SPI.
Figure 59 shows the selection process necessary to lock the SPI
interface mode.
To communicate to the ADT7516/ADT7517/ADT7519 using
the SPI protocol, send three pulses down the CS line as shown
in Figure 59. On the third rising edge (marked as C in Figure 59),
the part selects and locks the SPI interface. The user is now
limited to communicating to the device using the SPI protocol.
ADT7516/ADT7517/ADT7519
As per most SPI standards, the CS line must be low during
every SPI communication to the ADT7516/ADT7517/ADT7519
and high all other times. Typical examples of how to connect the
dual interface as I2C or SPI are shown in Figure 57 and Figure 58.
The following sections describe in detail how to use the I2C and
SPI protocols associated with the ADT7516/ADT7517/ADT7519.
ADT7516/
ADT7517/
ADT7519
CS
VDD
VDD
10kΩ
10kΩ
SDA
SCL
ADD
I2C ADDRESS = 1001 000
Figure 57. Typical I2C Interface Connection
ADT7516/
ADT7517/
ADT7519
CS
VDD
820Ω 820Ω 820Ω
LOCK AND
SELECT SPI
SPI FRAMING
EDGE
DIN
SCLK
DOUT
Figure 58. Typical SPI Interface Connection.
CS
(START HIGH)
CS
(START LOW)
A
B
C
SPI LOCKED ON
THIRD RISING EDGE
SPI FRAMING
EDGE
A
B
C
SPI LOCKED ON
THIRD RISING EDGE
SPI FRAMING
EDGE
Figure 59. Serial Interface—Selecting and Locking SPI Protocol
Rev. B | Page 37 of 44