ADSP-2115KP-80 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
ADSP-2115KP-80 Datasheet PDF : 64 Pages
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ADSP-21xx
TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163)
CLOCK SIGNALS & RESET
Parameter
13 MHz 13.824 MHz 16.67 MHz
Min Max Min Max Min Max
20 MHz
Min Max
25 MHz
Min Max
Frequency
Dependency
Min
Max Unit
Timing Requirement:
tCK
CLKIN Period
76.9 150 72.3 150 60 150 50 150 40 150
ns
tCKL CLKIN Width Low
20
20
20
20
15
20
ns
tCKH CLKIN Width High
20
20
20
20
15
20
ns
tRSP
RESET Width Low
384.5
361.5
300
250
200
5tCK1
ns
Switching Characteristic:
tCPL CLKOUT Width Low
28.5
26.2
20
15
10
0.5tCK – 10
ns
tCPH CLKOUT Width High
28.5
26.2
20
15
10
0.5tCK – 10
ns
tCKOH CLKIN High to CLKOUT 0
20 0
20 0
20 0
20 0 15
ns
High
NOTES
1Applies after powerup sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles, assuming stable CLKIN (not including crystal
oscillator startup time).
CLKIN
CLKOUT
tCK
tCKH
tCKL
tCPL
tCKOH
tCPH
Figure 29. Clock Signals
–30–
REV. C
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