ADN4668ARUZ-REEL7 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
ADN4668ARUZ-REEL7 Datasheet PDF : 12 Pages
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VCC
S1
SIGNAL
GENERATOR
RINx+
RINx–
EN
50Ω
EN
GND
RL
ROUTx
CL
NOTES
1. CL INCLUDES LOAD AND TEST JIG CAPACITANCE.
2. S1 CONNECTED TO VCC FOR tPZL AND tPLZ MEASUREMENTS.
3. S1 CONNECTED TO GND FOR tPZH AND tPHZ MEASUREMENTS.
Figure 4. Test Circuit for Receiver Enable/Disable Delay
EN WITH EN = GND
OR OPEN CIRCUIT
1.5V
1.5V
EN WITH EN = VCC
1.5V
ROUTx WITH VID = +100mV
tPHZ
0.5V
1.5V
tPZH
50%
ROUTx WITH VID = –100mV
50%
tPLZ
0.5V
tPZL
Figure 5. Receiver Enable/Disable Delay Waveforms
ADN4668
3V
0V
3V
0V
VOH
GND
VCC
VOL
Rev. A | Page 5 of 12
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