ADL5303 View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

ADL5303

160 dB Range 100 pA to 10 mA Low Cost Logarithmic Converter

Analog Devices 

Data Sheet

ADL5303

LOW SUPPLY SLOPE AND INTERCEPT

ADJUSTMENT

When using the device with a supply of less than 4 V, it is

necessary to reduce the slope and intercept at the VLOG pin

to preserve good log conformance over the entire 160 dB oper-

ating range. The voltage at the VLOG pin is generated by an

internal current source with an output current of 40 μA/decade

feeding the internal laser trimmed output resistance of 5 kΩ.

When the voltage at the VLOG pin exceeds VP − 2.3 V, the

current source ceases to respond linearly to logarithmic

increases in current. Avoid headroom issues by reducing

the logarithmic slope and intercept at the VLOG pin and by

connecting an external resistor, RS, from the VLOG pin to

ground in combination with an intercept lowering resistor, RZ.

The values shown in Figure 28 illustrate a good solution for a

3.0 V positive supply. The resulting logarithmic slope measured

at VLOG is 62.5 mV/decade with a new intercept of 57 fA. The

original logarithmic slope of 200 mV/decade can be recovered

using voltage gain on the internal buffer amplifier.

CHANGING THE VOLTAGE AT THE SUMMING NODE

The default value of VSUM is determined by using a quarter

of VREF (2 V). This can be altered by applying an independent

voltage source to VSUM, or by adding an external resistive

divider from VREF to VSUM. This network operates in parallel

with the internal divider (40 kΩ and 13.3 kΩ), and the choice

of external resistors should take this into account. In practice,

the total resistance of the added string may be as low as 10 kΩ

(consuming 400 μA from VREF). Low values of VSUM and

thus VCE are not advised when large values of IPD are expected.

VP

VPS2

10

IPD

VPDB

NC 5

VSUM

2

INPT

3

C1

1nF

C3

100nF

4 VSUM

PDB

PWDN

16

BIAS

VPS1

12

ADL5303

VREF

VREF

6

~10kΩ

0.5V

VLOG

8

TEMPERATURE

COMPENSATION

5kΩ

BFIN

9

BFNG

13

R14 (RZ)

15.4kΩ

C7 (RS)

2.67kΩ

R18 (RB)

2.26kΩ

R1

750Ω

15

GND

7

ACOM

14

GND

11

VOUT

R15 (RA)

4.98kΩ

NC = NO CONNECT

Figure 28. Recommended Low Supply Application Circuit

VOUT

500mV/DEC

Rev. 0 | Page 15 of 24

Share Link: