ADL5303 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
ADL5303 Datasheet PDF : 24 Pages
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Data Sheet
ADL5303
A wide range of gains may be used and the resistor magnitudes
are not critical; their parallel sum should be about equal to
the net source resistance at the noninverting input. When
high gains are used, the output dynamic range is reduced; for
a maximum swing of 4.8 V, it amounts to 4.8 V/VY decades.
Thus, using a ratio of 3×, to set up a slope 30 mV/dB (600 mV/
decade), eight decades can be handled, whereas with a ratio
of 5×, which sets up a slope of 50 mV/dB (1 V/decade), the
dynamic range is 4.8 decades, or 96 dB. When using a lower
supply voltage, the calculation proceeds in the same way,
remembering to first subtract 0.2 V to allow for 0.1 V upper
and lower headroom in the output swing.
Alteration of the logarithmic intercept is only slightly more
tricky. First, note that it is rarely necessary to lower the intercept
below a value of 100 pA, because this merely raises all output
voltages further above ground. However, where this is required,
the first step is to raise the voltage, VLOG, by connecting a
resistor, RZ, from VLOG to VREF (2 V) as shown in Figure 26.
This has the effect of elevating, VLOG, for small inputs while
lowering the slope to some extent because of the shunt effect
of RZ on the 5 kΩ output resistance. If necessary, the slope may
be increased as before, using a feedback attenuator around the
buffer. Table 5 lists some examples of lowering the intercept
combined with several slope variations.
Table 5. Examples of Lowering the Intercept
VY (mV/decade)
IZ (pA) RA (kΩ) RB (kΩ)
200
1
20.0
100
200
10
10.0
100
200
50
3.01
100
300
1
10.0
12.4
300
10
8.06
12.4
300
50
6.65
12.4
400
1
11.5
8.2
400
10
9.76
8.2
400
50
8.66
8.2
500
1
16.5
8.2
500
10
14.3
8.2
500
50
13.0
8.2
RZ (kΩ)
25
50
165
25
50
165
25
50
165
25
50
165
Use the following equation with Table 5:
VOUT
= GVY
×
RZ
RZ
+ RLOG
×
log 10
I PD
IZ
+ VREF
×
RLOG
RLOG + RZ
(9)
where G = 1 + RA/RB and RLOG = 5 kΩ.
VP
VPS2
10
IPD
VPDB
NC 5
VSUM
2
INPT
3
C1
1nF
C3
100nF
4 VSUM
PDB
PWDN
16
BIAS
VPS1
12
ADL5303
VREF
VREF
6
~10kΩ
0.5V
VLOG
8
TEMPERATURE
COMPENSATION
BFIN
5kΩ
9
BFNG
13
R1
750Ω
15
GND
7
ACOM
14
GND
11
VOUT
R14 (RZ)
R18 (RB)
R15 (RA)
NC = NO CONNECT
Figure 26. Method for Lowering the Intercept
VOUT
500mV/DEC
Rev. 0 | Page 13 of 24
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