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AD7927BRUZ View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
AD7927BRUZ Datasheet PDF : 29 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7927
Data Sheet
Parameter
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance3
Output Coding
Straight (Natural) Binary
Twos Complement
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
POWER REQUIREMENTS
AVDD
VDRIVE
IDD4
During Conversion
Normal Mode (Static)
Normal Mode (Operational) fSAMPLE = 200 kSPS
Using Auto Shutdown Mode fSAMPLE = 200 kSPS
Auto Shutdown (Static)
Full Shutdown Mode
Power Dissipation4
Normal Mode (Operational)
Auto Shutdown (Static)
Full Shutdown Mode
B Version1
VDRIVE − 0.2
0.4
±1
10
800
300
300
200
2.7/5.25
2.7/5.25
2.7
2
600
1.5
1.2
900
650
0.5
0.5
7.5
3.6
2.5
1.5
2.5
1.5
Unit
Test Conditions/Comments
V min
V max
μA max
pF max
ISOURCE = 200 μA, AVDD = 2.7 V to 5.25 V
ISINK = 200 μA
Coding bit set to 1
Coding bit set to 0
ns max
ns max
ns max
kSPS max
16 SCLK cycles with SCLK at 20 MHz
Sine wave input
Full-scale step input
See Serial Interface section
V min/max
V min/max
mA max
mA max
μA typ
mA max
mA max
μA typ
μA typ
μA max
μA max
Digital inputs = 0 V or VDRIVE
AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz
AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz
AVDD = 2.7 V to 5.25 V, SCLK on or off
AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz
AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz
AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz
AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz
SCLK on or off (20 nA typ)
SCLK on or off (20 nA typ)
mW max
mW max
μW max
μW max
μW max
μW max
AVDD = 5 V, fSCLK = 20 MHz
AVDD = 3 V, fSCLK = 20 MHz
AVDD = 5 V
AVDD = 3 V
AVDD = 5 V
AVDD = 3 V
1 Temperature ranges as follows: B Version: −40°C to +85°C; W Version: −40°C to +125°C.
2 See Terminology section.
3 Sample tested @ 25°C to ensure compliance.
4 See Power vs. Throughput Rate section.
Rev. D | Page 4 of 28

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