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AD7328BRUZ(2004) View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
AD7328BRUZ Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Preliminary Technical Data
AD7328
Pin Functional Descriptions
CS 1
20 SCLK
DIN 2
19 DGND
DGND 3 AD7328 18 DOUT
AGND 4
17 VDRIVE
REFIN/OUT 5
VSS 6
VIN0 7
VIN1 8
TOP VIEW
(Not to
Scale)
16 VCC
15 VDD
14 VIN2
13 VIN3
VIN4 9
VIN5 10
12 VIN6
11 VIN7
Figure 3. AD7328 Pin Configuration TSSOP
Pin Mnemonic
SCLK
DOUT
CS
DIN
VDRIVE
DGND
AGND
REF IN/REFOUT
VCC
VDD
VSS
Vin0-Vin7
Table 4. AD7328 Pin Function Descriptions
Pin Number
20
18
1
2
17
3, 19
4
5
16
15
6
7,8,9,10,11,12,13,14
Description
Serial Clock. Logic Input. A serial clock input provides the SCLK used for accessing the data
from the AD7328. This clock is also used as the clock source for the conversion process.
Serial Data Output. The conversion output data is supplied to this pin as a serial data stream.
The bits are clocked out on the falling edge of the SCLK input and 16 SCLKs are required to
access the data. The data stream consists of three channel identification bits, followed by the
sign bit followed by the 12 bits of conversion data. The data is provided MSB first.
See the Serial Interface section.
Chip Select. Active low logic input. This input provides the dual function of initiating
conversions on the AD7328 and frames the serial data transfer.
Data In. Data to be written to the on-chip registers is provided on this input and is clocked into
the register on the falling edge of SCLK. See Register section.
Logic power supply input. The voltage supplied at this pin determines at what voltage the
interface will operate. This pin should be decoupled to DGND. The voltage at this pin may be
different to that at VCC but should never exceed VCC by more than 0.3V.
Digital Ground. Ground reference point for all digital circuitry on the AD7328. The DGND and
AGND voltages ideally should be at the same potential and must not be more than 0.3 V apart
even on a transient basis.
Analog Ground. Ground reference point for all analog circuitry on the AD7328. All analog input
signals and any external reference signal should be referred to this AGND voltage. The AGND
and DGND voltages ideally should be at the same potential and must not be more than 0.3 V
apart, even on a transient basis.
Reference Input/ Reference Output pin. The on-chip reference is available on this pin for use
external to the AD7328. Alternativley, the internal reference can be disabled and an external
reference applied to this input. On power up this is the default condition. The nominal internal
reference voltage is 2.5 V, which appears at the pin. A 470 nF capacitor should be placed on
the Reference pin. (See Reference Section)
Analog Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for the ADC core on the
AD7328. This supply should be decoupled to AGND.
Positive power supply voltage. This is the positive supply voltage for the Analog Input section.
Negative power supply voltage. This is the negavtive supply voltage for the Analog Input
section.
Analog input 0 through Analog Input 7. The analog inputs are multiplexed into the on-chip
track-and-hold. The analog input channel for conversion is selected by programming the
channel address bits, ADD2 through ADD0, in the control register. The inputs can be
configured as 8 Single-Ended Inputs, 4 True Differential Input pairs, 4 Pseudo differential
inputs or 7 pseudo differential inputs. The configuration of the Analog inputs is selected by
programming the Mode bits, Mode1 and Mode0, in the Control Register. The input range on
each input channel is controlled by programming the range registers. Inputs ranges of ±10V,
±5V, ±2.5V and 0 to 10V can be selected on each analog input channel. See Register section.
Rev. PrK | Page 8 of 24

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