AD7291BCPZ View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

AD7291BCPZ

8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor

Analog Devices 

Data Sheet

AD7291

READING DATA FROM THE AD7291

READING TWO BYTES OF DATA FROM A 16-BIT

REGISTER

Reading two bytes of data from a 16-bit register consists of the

following sequence (see Figure 27):

Reading the contents from any of the 16-bit registers is a 2-byte

read operation. In this protocol, the first part of the transaction

writes to the register pointer. When the register address is set up,

any number of reads can be performed from that particular register

without having to write to the address pointer register again. When

the required number of reads is completed, the master must not

acknowledge the final byte. This tells the slave to stop transmitting,

allowing a stop condition to be asserted by the master. Further

reads from this register can be performed in a future transaction

without having to rewrite to the register pointer.

If a read from a different address is required, the relevant

register address has to be written to the address pointer register

and, again, any number of reads from this register can then be

performed. In the following example, the master device reads

three lots of 2-byte data from a slave device but as many lots

consisting of two bytes can be read as required. This protocol

assumes that the particular register address is set up by a single-

byte write operation to the address pointer register.

S

SLAVE ADDRESS

1A

DATA[15:8]

A

1. The master device asserts a start condition on SDA.

2. The master sends the 7-bit slave address followed by the

read bit (high).

3. The addressed slave device asserts an acknowledge on SDA.

4. The master receives a data byte.

5. The master asserts an acknowledge on SDA.

6. The master receives a second data byte.

7. The master asserts an acknowledge on SDA.

8. The master receives a data byte.

9. The master asserts an acknowledge on SDA.

10. The master receives a second data byte.

11. The master asserts an acknowledge on SDA.

12. The master receives a data byte.

13. The master asserts an acknowledge on SDA.

14. The master receives a second data byte.

15. The master asserts a not acknowledge on SDA to notify the

slave that the data transfer is complete.

16. The master asserts a stop condition on SDA to end the

transaction.

DATA[7:0]

A

DATA[15:8]

A

DATA[7:0]

A ...

...

DATA[15:8]

A

DATA[7:0]

AP

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

S = START CONDITION

SR = REPEATED START

P = STOP CONDITION

A = ACKNOWLEDGE

A = NOT ACKNOWLEDGE

Figure 27. Reading Three Lots of Two Bytes of Data from the Conversion Result Register

Rev. C | Page 23 of 28

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