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AD2S81 View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
AD2S81 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD2S81A/AD2S82A
Parameter
Conditions
AD2S81A
Min Typ Max
AD2S82A
Min Typ Max
COMPLEMENT4, 5
Internally Pulled High (100 k) to
+VS; Logic LO to Activate; No
Connect for Normal Operation
BUSY3
Sense
Width
Load
Logic HI When Position O/P Changing
200
600
200
600
Use Additional Pull-Up
1
1
DIRECTION3
Sense
Max Load
Logic HI Counting Up
Logic LO Counting Down
3
3
RIPPLE CLOCK3
Sense
Width
Reset
Load
Logic HI, All 1s to All 0s
All 0s to All 1s
Dependent On Input Velocity
300
300
Before Next Busy
3
3
DIGITAL INPUTS
High Voltage, VIH
Low Voltage, VIL
INHIBIT, ENABLE
2.0
2.0
DB1–DB16, Byte Select
± VS = ± 10.8 V, VL = 5.0 V
INHIBIT, ENABLE
0.8
0.8
DB1–DB16, Byte Select
± VS = ± 13.2 V, VL = 5.0 V
DIGITAL INPUTS
High Current, IIH
Low Current, IIL
INHIBIT, ENABLE
DB1–DB16
± VS = ± 13.2 V, VL = 5.5 V
INHIBIT, ENABLE
DB1–DB16, Byte Select
± VS = ± 13.2 V, VL = 5.5 V
؎100
؎100
؎100
؎100
DIGITAL INPUTS
Low Voltage, VIL
Low Current, IIL
DIGITAL OUTPUTS
High Voltage, VOH
Low Voltage, VOL
ENABLE = HI
SC1, SC2, Data Load
± VS = ± 12.0 V, VL = 5.0 V
ENABLE = HI
SC1, SC2, Data Load
± VS = ± 12.0 V, VL = 5.0 V
1.0
1.0
–400
–400
DB1–DB16; RIPPLE CLK, DIR
2.4
2.4
± VS = ± 12.0 V, VL = 4.5 V
IOH = 100 µA
DB1–DB16, RIPPLE CLK, DIR
0.4
0.4
± VS = ± 12.0 V, VL = 5.5 V
IOL = 1.2 mA
THREE-STATE LEAKAGE
Current IL
DB1–DB16 Only
+VS = ± 12.0 V, VL = 5.5 V
VOL = 0 V
+VS = ± 12.0 V, VL = 5.5 V
VOH = 5.0 V
± 100
± 100
± 100
± 100
POWER SUPPLIES
Voltage Levels
+VS
–VS
+VL
Current
+IS
+IS
+IL
± VS @ ± 12 V
± VS @ ± 13.2 V
± VL @ ± 5.0 V
+10.8
–10.8
+5
؎12
؎19
؎0.5
+13.2
–13.2
+13.2
؎23
؎30
؎1.5
+10.8
–10.8
+5
؎12
؎19
؎0.5
+13.2
–13.2
+13.2
؎23
؎30
؎1.5
NOTES
1Refers to small signal bandwidth.
2Output offset dependent on value for R6.
3Refer to timing diagram.
4AD2S82A only.
5These pins are referenced to +VS (i.e., HI = +12 V, LO = 0 V).
Specifications subject to change without notice.
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test.
Units
ns
LSTTL
LSTTL
LSTTL
V
V
µA
µA
V
µA
V
V
µA
µA
V
V
V
mA
mA
mA
REV. B
–3–

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