NXP Semiconductors
74LVC169
Presettable synchronous 4-bit up/down binary counter
VI
CET
GND
VOH
TC
VOL
VM
tPHL
VM
tPLH
VI
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Fig 9.
Measurement points are given in Table 8.
Logic levels: VOL and VOH are the typical output voltage levels that occur with the output load.
Input (CET) to output (TC) propagation delays
VI
U/D
GND
VOH
TC
VOL
VM
tPHL
VM
tPLH
VI
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Measurement points are given in Table 8.
Logic levels: VOL and VOH are the typical output voltage levels that occur with the output load.
Fig 10. The up/down control input (U/D) to output (TC) propagation delays
74LVC169_5
Product data sheet
Rev. 05 — 8 June 2009
© NXP B.V. 2009. All rights reserved.
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