S8024RN View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
S8024RN Datasheet PDF : 27 Pages
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73S8024RN Data Sheet
DS_8024RN_020
Symbol Parameter
Condition
Min
Typ
Max
Unit
Interface Requirements – Data Signals: I/O, AUX1, AUX2, and host interfaces: I/OUC, AUX1UC,
AUX2UC.
ISHORTL, ISHORTH, and VINACT requirements do not pertain to I/OUC, AUX1UC, and AUX2UC.
VOH
Output level, high (I/O, AUX1,
AUX2)
IOH =0
IOH = -40µA
0.9 VCC
0.75 VCC
VOH
Output level, high (I/OUC,
AUX1UC, AUX2UC)
IOH =0
IOH = -40µA
0.9 VDD
0.75 VDD
VOL
Output level, low
IOL=1mA
VIH
Input level, high (I/O, AUX1,
AUX2)
1.8
VCC+0.1
V
VCC+0.1
V
VDD+0.1
V
VDD+0.1
V
0.3
V
VCC+0.30
V
VIH
Input level, high (I/OUC,
AUX1UC, AUX2UC)
1.8
VDD
+0.30
V
VIL
Input level, low
-0.3
VINACT
Output voltage when outside
of session
IOL = 0
IOL = 1mA
ILEAK
Input leakage
VIH = VCC
0.8
V
0.1
V
0.3
V
10
µA
IIL
ISHORTL
Input current, low
Short circuit output current
VIL = 0
For output low,
shorted to VCC
through 33 ohms
0.65
mA
15
mA
ISHORTH
tR, tF
Short circuit output current
Output rise time, fall times
For output high,
shorted to ground
through 33 ohms
For I/O, AUX1,
AUX2, CL = 80pF,
10% to 90%.
For I/OUC,
AUX1UC, AUX2UC,
CL=50Pf, 10% to
90%.
15
mA
100
ns
tIR, tIF
RPU
Input rise, fall times
Internal pull-up resistor
1
µs
Output stable for
>200ns
8
11
14
kΩ
FDMAX
Maximum data rate
TFDIO
Delay, I/O to I/OUC, AUX1 to
60
AUX1UC, AUX2 to AUX2UC,
I/OUC to I/O, AUX1UC to
Edge from master to
TRDIO
AUX1, AUX2UC to AUX2
(respectively falling edge to
slave, measured at
50%
falling edge and rising edge
to rising edge)
1
MHz
100
200
ns
25
90
ns
CIN
Input capacitance
10
pF
18
Rev. 2
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