AD8314
Table 4. Typical Specifications at Selected Frequencies at 25°C (Mean and Σ)
Frequency (GHz)
0.1
0.9
1.9
2.5
1 Refer to Figure 32.
Slope (mV/dB)
μ
σ
21.3
0.4
20.7
0.4
19.7
0.4
19.2
0.4
Intercept (dBV)
μ
σ
−62.2
0.4
−63.6
0.4
−66.3
0.4
−62.1
0.7
±1 dB Dynamic Range1 (dBV)
High Point
Low Point
μ
σ
μ
σ
–11.8
0.3
−59
0.5
–13.8
0.3
−61.4
0.4
–19
0.7
−64
0.6
–16.4
1.7
−61
1.3
However, the logarithmic slope, the amount by which the
output V_UP changes for each decibel of input change (voltage
or power) is, in principle, independent of waveform or termination
impedance. In practice, it usually falls off somewhat at higher
frequencies, due to the declining gain of the amplifier stages
and other effects in the detector cells. For the AD8314, the slope
at low frequencies is nominally 21.3 mV/dB, falling almost
linearly with frequency to about 19.2 mV/dB at 2.5 GHz. These
values are sensibly independent of temperature (see Figure 10)
and almost totally unaffected by the supply voltage from 2.7 V
to 5.5 V (see Figure 11).
INVERTED OUTPUT
The second provision is the inclusion of an inverting amplifier
to the output, for use in controller applications. Most power
amplifiers require a gain-control bias that must decrease from a
large positive value toward ground level as the power output is
required to decrease. This control voltage, which appears at
Pin V_DN, is not only of the opposite polarity to V_UP, but also
needs to have an offset added to determine its most positive value
when the power level (assumed to be monitored through a
directional coupler at the output of the PA) is minimal.
The starting value of V_DN is nominally 2.25 V, and it falls on a
slope of twice that of V_UP; in other words,−43 mV/dB. Figure 29
shows how this is achieved: the reference voltage that determines
the maximum output is derived from the on-chip voltage
reference and is substantially independent of the supply voltage
or temperature. However, the full output cannot be attained for
supply voltages under 3.3 V; Figure 22 shows this dependency.
The relationship between V_UP and V_DN is shown in Figure 30.
CURRENTS FROM
DETECTORS
AD8314
2.5
V_UP
I-V
+2
V_DN
+
V-I
FLTR
VSET VDN = 2.25V – 2.0 × V_UP
BAND GAP
REFERENCE
1.125V
Figure 29. Output Interfaces
OUTPUT FOR
2.0
PA CONTROL
V_DN
1.5
1.0
OUTPUT FOR
V_UP
0.5
MEASUREMENT
0
–60
–50
–40
–30
–20
–10
0
INPUT AMPLITUDE (dBV)
Figure 30. Showing V_UP and V_DN Relationship
Rev. B | Page 11 of 20