Philips Semiconductors
2-input NOR gate
Product specification
74AHC1G02; 74AHCT1G02
FEATURES
• Symmetrical output impedance
• High noise immunity
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
– CDM EIA/JESD22-C101 exceeds 1000 V.
• Low power dissipation
• Balanced propagation delays
• Very small 5-pin package
• Output capability: standard
• Specified from −40 to +125 °C.
DESCRIPTION
The 74AHC1G/AHCT1G02 is a high-speed Si-gate CMOS
device.
The 74AHC1G/AHCT1G02 provides the 2-input NOR
function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
CI
CPD
propagation delay A and B to Y
input capacitance
power dissipation capacitance
CL = 15 pF; VCC = 5 V
CL = 50 pF; f = 1 MHz;
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
TYPICAL
AHC1G AHCT1G
UNIT
3.2
3.5
ns
1.5
1.5
pF
18
19
pF
2002 May 27
2