WU
W
TI I G DIAGRA S
LTC1402
SCK
t4
CONV
INTERNAL
S/H STATUS
t6
SAMPLE
DOUT
t2
t3
t7
1
2
34
5
6
7
8
9 10 11 12 13 14 15 16 1
2
t5
t0
HOLD
SAMPLE
t8a
t8
DOUT REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
Hi-Z
Hi-Z
REF D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
REFRDY BIT + 12-BIT DATA WORD
tCONV
tTHROUGHPUT
HOLD
REF
1402 TD01
SCK
CONV
NAP
SLEEP
VREF
REFRDY
Nap Mode and Sleep Mode Waveforms
t1
t1
t12
t11
NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS. REFRDY APPEARS AS A BIT IN THE DOUT WORD.
1402 TD02
SCK
DOUT
SCK to DOUT Delay
VIH
SCK
VIH
t8
t10
t9
VOH
DOUT
VOL
90%
10%
1402 TD03
9