100336 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
MFG CO.
100336 Datasheet PDF : 14 Pages
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SOIC and PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
TC = 0°C
Min
Max
TC = +25°C
Min
Max
TC = +85°C
Min
Max
Units
Conditions
fSHIFT
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
Shift Frequency
Propagation Delay
CP to Qn, Qn
Propagation Delay
CP to TC (Shift)
Propagation Delay
CP to TC (Count)
Propagation Delay
MR to Qn, Qn
Propagation Delay
MR to TC (Count)
Propagation Delay
MR to TC (Shift)
350
350
350
MHz Figures 2, 3
1.00
1.80
1.00
1.80
1.00
1.80
Figures 1, 2
ns
(Note 6)
2.10
3.30
2.10
3.30
2.10
3.50
Figures 1, 7, 8
ns
(Note 6)
2.40
4.20
2.40
4.20
2.60
4.50
Figures 1, 9
ns
(Note 6)
1.40
2.30
1.40
2.30
1.50
2.40
Figures 1, 4
ns
(Note 6)
2.80
4.90
2.90
5.00
3.10
5.30
Figures 1, 12
ns
(Note 6)
2.40
3.80
2.40
3.80
2.50
3.90
Figures 1, 10, 11
ns
(Note 6)
tPLH
Propagation Delay
tPHL
D0/CET to TC
tPLH
Propagation Delay
tPHL
Sn to TC
tTLH
Transition Time
tTHL
20% to 80%, 80% to 20%
tS
Setup Time
D3
Pn
D0/CET
CEP
1.80
2.90
1.80
2.90
1.90
3.10
1.90
3.90
1.90
3.90
2.10
4.20
0.35
1.10
0.35
1.10
0.35
1.10
ns
Figures 1, 5
(Note 6)
ns
ns Figures 1, 3
0.90
0.90
0.90
1.40
1.40
1.40
1.20
1.20
1.20
1.30
1.30
1.30
ns Figures 4, 6
Sn
3.30
3.30
3.30
MR (Release Time)
2.50
2.50
2.50
tH
Hold Time
D3
Pn
D0/CET
CEP
0.30
0.30
0.30
0.20
0.20
0.20
0.20
0.20
0.20
0.10
0.10
0.10
Figure 6
ns
Sn
0.00
0.00
0.00
tPW(H) Pulse Width HIGH
2.00
2.00
2.00
CP, MR
ns Figures 3, 4
tOSHL
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
200
200
200
ps (Note 7)
Clock to Output Path
tOSLH
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
200
200
200
ps (Note 7)
Clock to Output Path
tOST
Maximum Skew Opposite Edge
PLCC Only
Output-to-Output Variation
230
230
230
ps (Note 7)
Clock to Output Path
tPS
Maximum Skew
PLCC Only
Pin (Signal) Transition Variation
245
245
245
ps (Note 7)
Clock to Output Path
Note 6: The propagation delay specified is for single output switching. Delays may vary up to 250 ps with multiple outputs switching.
Note 7: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite
directions both HL and LH (tOST). Parameters tOST and tps guaranteed by design
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