KM681000B Family
TEST CONDITIONS(2. Temperature and Vcc Conditions)
Product Family
KM681000BL/L-L
KM681000BLE/LE-L
KM681000BLI/LI-L
Temperature
0~70¡É
-25~85¡É
-40~85¡É
Power Supply(Vcc)
5.0V¡¾10%
5.0V¡¾10%
5.0V¡¾10%
PRELIMINARY
CMOS SRAM
Speed Bin
55/70ns
70/100ns
70/100ns
Comments
Commercial
Extended
Industrial
PARAMETER LIST FOR EACH SPEED BIN
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO1,tCO2
tOE
tLZ1,tLZ2
tOLZ
tHZ1,tHZ2
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
55ns
Min Max
55
-
-
55
-
55
-
25
10
-
5
-
0
20
0
20
10
-
55
-
45
-
0
-
45
-
40
-
0
-
0
20
25
-
0
-
5
-
Speed Bins
70ns
Min Max
70
-
-
70
-
70
-
35
10
-
5
-
0
25
0
25
10
-
70
-
60
-
0
-
60
-
50
-
0
-
0
25
30
-
0
-
5
-
100ns
Min Max
100
-
-
100
-
100
-
50
10
-
5
-
0
30
0
30
10
-
100
-
80
-
0
-
80
-
60
-
0
-
0
30
40
-
0
-
5
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Revision 0.3
April 1996