AN221D04-DEVLP View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
AN221D04-DEVLP Datasheet PDF : 21 Pages
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AN221E04 Datasheet – Dynamically Reconfigurable FPAA With Enhanced I/O
Power Supply Rejection Ratio (PSRR) Measurements
The following plots give an indication of the PSRR for some representative CAMs.
AVDD to Power Supply (PS): 5v +/- 0.25v sinusoidal waveform (100 kHz to 1 MHz)
8 0 .0 0
70 .0 0
6 0 .0 0
50 .0 0
4 0 .0 0
3 0 .0 0
2 0 .0 0
DC
INPUT AMP PSRR [dB]
10 0
1KHz 10KHz 100KHz 1M Hz
8 0 .0 0
70 .0 0
6 0 .0 0
50 .0 0
4 0 .0 0
3 0 .0 0
2 0 .0 0
DC
INPUT LPF PSRR [dB]
15
50 100 1KHz 10KHz 100KHz 1M Hz
10 0 .0 0
9 0 .0 0
8 0 .0 0
70 .0 0
6 0 .0 0
50 .0 0
4 0 .0 0
3 0 .0 0
2 0 .0 0
VMR, Vref+, Vref- PSRR [dB]
PSRR_VMR [ dB]
PSRR_VREFP [ dB]
PSRR_VREFP [ dB]
DC
10 0
1KHz 10KHz 100KHz 1M Hz
8 0 .0 0
70.00
6 0 .0 0
50.00
4 0 .0 0
3 0 .0 0
2 0 .0 0
OUTPUT Voltage Mode + LPF PSRR [dB]
DC
100
1KHz 10KHz 100KHz 1M Hz
10 0
90
80
70
60
50
40
30
20
DC
GAININV_1MHz PSRR [dB]
50
100 1KHz 10KHz 100KHz 1M Hz
GAININV_4MHz PSRR [dB]
100
90
80
70
60
50
40
30
20
10 0
1KHz
10KHz
10 0 KHz
1M Hz
DS030100-U006a - 19 -
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