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MAX9234(2005) View Datasheet(PDF) - Maxim Integrated

Part Name
Description
MFG CO.
MAX9234
(Rev.:2005)
MaximIC
Maxim Integrated 
MAX9234 Datasheet PDF : 14 Pages
First Prev 11 12 13 14
Hot-Swappable, 21-Bit, DC-Balanced LVDS
Deserializers
In the following example, the incremental supply current is
calculated for VCCO = 5.5V, fC = 34MHz, and CL = 8pF:
VI = 5.5V - 3.6V = 1.9V
CT = CINT + CL = 6pF + 8pF = 14pF
where:
II = CTVI 0.5FC x 21 (data outputs) + CTVIfC x 1 (clock
output).
II = (14pF x 1.9V x 0.5 x 34MHz x 21) + (14pF x 1.9V x
34MHz).
II = 9.5mA + 0.9mA = 10.4mA.
The maximum supply current in DC-balanced mode for
VCC = VCCO = 3.6V at fC = 34MHz is 106mA (from the
DC Electrical Characteristics table). Add 10.4mA to get
the total approximate maximum supply current at VCCO
= 5.5V and VCC = 3.6V.
If the output supply voltage is less than VCCO = 3.6V,
the reduced supply current can be calculated using the
same formula and method.
At high switching frequency, high supply voltage, and
high capacitive loading, power dissipation can exceed
the package power-dissipation rating. Do not exceed
the maximum package power-dissipation rating. See
the Absolute Maximum Ratings for maximum package
power-dissipation capacity and temperature derating.
Functional Diagram
RxIN0+
RxIN0-
LVDS DATA
RECEIVER 0
STROBE
RxIN1+
RxIN1-
LVDS DATA
RECEIVER 1
STROBE
RxIN2+
RxIN2-
LVDS DATA
RECEIVER 2
STROBE
LVDS CLOCK
RECEIVER
RxCLK IN+
9x
RxCLK IN-
PLL
DATA
CHANNEL 0
SERIAL-TO-
PARALLEL
CONVERTER
RxOUT0–6
DATA
CHANNEL 1
SERIAL-TO-
PARALLEL
CONVERTER
RxOUT7–13
DATA
CHANNEL 2
SERIAL-TO-
PARALLEL
CONVERTER
RxOUT14–20
REFERENCE
CLOCK
GENERATOR
RxCLK OUT
PWRDWN
Rising- or Falling-Edge Output Strobe
The MAX9234 has a rising-edge output strobe, which
latches the parallel output data into the next chip on the
rising edge of RxCLK OUT. The MAX9236/MAX9238
have a falling-edge output strobe, which latches the
parallel output data into the next chip on the falling
edge of RxCLK OUT. The deserializer output strobe
polarity does not need to match the serializer input
strobe polarity. A deserializer with rising- or falling-
edge output strobe can be driven by a serializer with a
rising-edge input strobe.
Pin Configuration
TOP VIEW
RxOUT17 1
RxOUT18 2
GND 3
RxOUT19 4
RxOUT20 5
N.C. 6
LVDS GND 7
RxIN0- 8
RxIN0+ 9
RxIN1- 10
RxIN1+ 11
LVDS VCC 12
LVDS GND 13
RxIN2- 14
RxIN2+ 15
RxCLK IN- 16
RxCLK IN+ 17
LVDS GND 18
PLL GND 19
PLL VCC 20
PLL GND 21
PWRDWN 22
RxCLK OUT 23
RxOUT0 24
MAX9234
MAX9236
MAX9238
48 VCCO
47 RxOUT16
46 RxOUT15
45 RxOUT14
44 GND
43 RxOUT13
42 VCC
41 RxOUT12
40 RxOUT11
39 RxOUT10
38 GND
37 RxOUT9
36 VCCO
35 RxOUT8
34 RxOUT7
33 RxOUT6
32 GND
31 RxOUT5
30 RxOUT4
29 RxOUT3
28 VCCO
27 RxOUT2
26 RxOUT1
25 GND
TSSOP
Chip Information
MAX9234 TRANSISTOR COUNT: 14,104
MAX9236 TRANSISTOR COUNT: 14,104
MAX9238 TRANSISTOR COUNT: 14,104
PROCESS: CMOS
______________________________________________________________________________________ 13

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