Nexperia
74LVC74A
Dual D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter
Conditions
trec
tsu
th
fmax
tsk(o)
CPD
recovery time set or reset; see Fig. 8
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
set-up time
VCC = 3.0 V to 3.6 V
nD to nCP; see Fig. 7
hold time
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nD to nCP; see Fig. 7
maximum
frequency
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nCP; see Fig. 7
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
output skew time VCC = 3.0 V to 3.6 V
power dissipation per flip-flop; VI = GND to VCC
capacitance
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
1.5
-
-
1.5
1.5
-
-
1.5
1.5
-
-
1.0
+1.0 -3.0
-
1.0
- ns
- ns
- ns
- ns
3.0
-
-
3.0
2.5
-
-
2.5
2.2
-
-
2.2
2.0
0.8
-
2.0
- ns
- ns
- ns
- ns
2.0
-
-
2.0
1.5
-
-
1.5
1.0
-
-
1.0
+1.0 -0.2
-
1.0
- ns
- ns
- ns
- ns
100
-
-
80
125
-
-
100
150
-
-
120
150
250
-
120
[3] -
-
1.0
-
[4]
-
12.4
-
-
-
16.0
-
-
-
19.1
-
-
- MHz
- MHz
- MHz
- MHz
1.5 ns
- pF
- pF
- pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL x VCC 2 x fo) = sum of the outputs
74LVC74A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 18 June 2020
© Nexperia B.V. 2020. All rights reserved
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