74LVC74APW View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
74LVC74APW Datasheet PDF : 10 Pages
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Philips Semiconductors
Dual D-type flip-flop with set and reset;
positive-edge trigger
Product Specification
74LVC74A
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 S VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI
nD INPUT
GND
VI
nCP INPUT
GND
VOH
nQ OUTPUT
VOL
VOH
nQ OUTPUT
VOL
VM
th
t su
th
t su
1/f max
VM
tW
t PHL
t PLH
VM
VM
t PLH
t PHL
NOTE: The shaded areas indicate when the inputis permitted to change for predictable
output performance.
SV00489
Figure 1. Clock (nCP) to output (nQ, nQ) propagation delays,
clock pulse width, nD to nCP set-up times,
the nCP to nD hold times, output transition times
and maximum clock pulse frequency.
VI
nCP INPUT
GND
VI
nS D INPUT
GND
VI
nR D INPUT
GND
VOH
nQ OUTPUT
VOL
VM
tW
tPLH
VM
VM
trem
tW
VM
tPHL
VOH
nQ OUTPUT
VOL
VM
tPHL
tPLH
SV00490
Figure 2. Set (nSD) and reset (nRD) input to output (nQ, nQ)
propagation delays, the set and reset pulse widths
and the nRD to nCP removal time.
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
VCC
D.U.T.
S1
2 * VCC
Open
GND
500Ω
VO
50pF
CL
500Ω
SWITCH POSITION
TEST
S1
tPLH/tPHL
Open
VCC
< 2.7V
2.7–3.6V
VI
VCC
2.7V
SV00903
Figure 3. Load circuitry for switching times.
1998 Jun 17
6
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